Field of the Invention
The present invention relates to integrated circuit device structures fabricated laterally in semiconductor material in a self-aligned manner and, more particularly, to complementary bipolar transistor, Schottky Barrier diode and resistor device structures laterally fabricated, in integrated form, in semiconductor material using self-aligned processing techniques.
U.S. patent application Ser. No. 133,155 entitled "A Polysilicon-Base Self-Aligned Bipolar Transistor Process and Structure" filed Mar. 24, 1980, by Ho et al, and assigned to the assignee of this application now Defensive Publication No. T104102 PCT application No. PCT/U.S.79/01137 entitled "Method for Achieving Ideal Impurity Base Profile in a Transistor" filed Dec. 28, 1979, by B. L. Crowder et al, and assigned to the assignee of this application.
U.S. patent application Ser. No. 133,156 entitled "High Performance Bipolar Transistor with Polysilicon Base Contacts and Method for Making Same" filed Mar. 24, 1980, by C. G. Jambotkar, and assigned to the assignee of this application now U.S. Pat. No. 4,319,932.
U.S. patent application Ser. No. 167,184 entitled "Polysilicon Emitter with Self-Aligned Metal Process" filed July 8, 1980, by Goth et al, and assigned to the assignee of this application now U.S. Pat. No. 4,400,865.